PIs: Bertan Bakkaloglu and Jennifer Kitchen.
As more and more automobiles equipped with radar systems based on the state-of-the-art Frequency-Modulated-Continuous-Wave (FMCW) radar architecture enter the world’s roadways, the susceptibility of FMCW-based radar systems to interference as well as their limited range and accuracy will become critical safety issues. Digitally-Modulated Radar (DMR) (also known as Pseudo-Random-Binary-Sequence (PRBS) or Noise) based radar architectures are potentially much less susceptible to interference (or jamming) and offer superior range and range resolution, in addition to relaxed linearity, noise and overall performance requirements with associated mmWave transceiver circuitry. The overarching goal of this center project is to develop the fundamental building blocks of a DMR system in an CMOS advanced silicon process technology (e.g. <16nm), then a complete DMR transceiver, and ultimately a single-chip all-CMOS DMR radar system. In order to achieve this goal, our initial research will be focused on developing a system-level model of a DMR architecture in Matlab/Simulink that includes system-level non-ideal effects such as noise, interference, multi-path fading, path losses, etc. and block-level non-ideal effects such as linearity, bandwidth, phase noise, dynamic range, etc. The resulting model will then be used to develop an optimized automotive radar system based upon a DMR architecture and then to define the performance requirements for the individual circuits blocks (e.g. PA, LNA, Mixer, ADC, etc.) that comprise the transceiver. The required signal processing algorithms will also be defined and optimized.